A brief discussion of each circuit is presented in order to highlight specific features.
'Basic Logic' demonstrates the use of naming functions, switches and outputs in order to explain basic logic suitable for the most introductory levels of education.
'Adders' illustrates the way in which simple logic gates can be so connected as to perform the function of binary addition. It can be seen that the Half Adder and Full Adder modules (usually available in subsequent exercises) embody the diagrams of their internal functionality.
'Memory Cell' contains three circuits. The basic R/S Flip Flop, The simple Data Latch to explain how the R/S Flip Flop can perform as a memory cell and a small circuit to illustrate how such a memory cell, as a member of a 2D matrix, could be accessible to and from a Data Bus using the Memory Request and Read/Write signals.
'Traffic Lights' uses a small 16 x 8 bit memory configured as a Read Only sequence table for simple traffic light set up at a road junction. The sequence data can be easily altered (command double click on memory) to demonstrate almost any of the international sequences.
'Counters' The Asynchronous and Synchronous counters are most effective in demonstrating synchronous and asynchronous concepts. The 7-segment display offers an immediate view of the potential hazards of asynchronous ripple counting which can be enhanced even further through the use of the Single Step mode of execution. The timing diagrams can be used to reinforce the explanation.
The decade counter versions further this concept by observing that on the asynchronous counter the display momentarily shows a count of ten ('A') before resetting to zero. The synchronous counter, as it is reset on the first half cycle of the clock never shows this effect.
A further feature of these circuits is the is the feedback principle used in the reset logic which is best observed in Single Step mode or in the Timing Diagram
'ALU & Memory' links the higher order devices together to form the heart of a simple Calculator or Computer's Central Processor. The student is required to ad to and operate the elements according to a designed protocol which illustrates the sequential behaviour of the modern computer.
A further step would be to drive the (switched) control lines from a memory based sequencer, such as that provided for the Traffic Lights.
